The invention relates to a semiconductor device comprising a semiconductor body with a surface region of a first conductivity type adjoining a surface, which semiconductor body is provided at the surface with a non-volatile memory which is erasable by means of UV irradiation and which comprises a number of memory cells, each in the form of a field effect transistor with source and drain zones of the opposed, i.e. the second conductivity type, a floating gate situated above the channel between the source and drain zones, and a control gate situated above the floating gate.
Non-volatile memories are generally known. Conventional embodiments of the transistor have a floating gate of the n-channel type with source and drain zones of the n-type and a surface region of the p-type. An n-channel embodiment will be described below. In principle however, embodiments of the opposed conductivity type are also possible. Information is written in the form of electric charge on the floating gate, thus defining the threshold voltage of the transistor. Depending on the stored information, the threshold voltage in a memory cell has a (comparatively) high or a (comparatively) low value. A voltage lying between these two values is applied to the control gate for the purpose of reading, and it is ascertained whether the transistor is, or is not, conducting.
It is possible, for the purpose of writing, to provide a negative charge on the floating gate by means of injection of hot electrons from the channel of a selected cell, thereby causing the threshold voltage of the n-channel transistor to increase to a high value. The cell can be erased through irradiation with electromagnetic radiation in the UV region, hereinafter referred to as UV radiation for short. The UV radiation forms electrons in the floating gate of sufficient energy for flowing across the potential barrier of the gate oxide between the channel and the floating gate towards the semiconductor body. When a sufficient number of electrons have disappeared from the floating gate, a state with a low threshold voltage has been obtained again.
It was found in practice that the threshold voltage often does not return to its original value, for example 1.1 V, during UV erasure, but to a much higher value, for example 2 V. This high threshold voltage may give rise to problems in, for example, low-voltage or low-power applications. A memory cell which is programmed in the "ON" state (low threshold) must have a threshold voltage which is substantially lower than the supply voltage. It is indeed possible to generate higher voltages with an on-chip charge pump, but such a charge pump is often not attractive on account of its high dissipation.